1. Field of the Invention
The present invention relates to a video signal processing apparatus for conducting a series of signal processings in accordance with a synchronizing signal.
2. Description of the Related Art
In a case where a series of signal processings are conducted on a video signal by the passage of the video signal through series-connected signal processing blocks, the same synchronizing signal is generally supplied from a single circuit, for example, a synchronizing signal separation circuit, to the individual signal processing blocks as a reference signal, so that the time delay required in each signal processing block is imposed on the synchronizing signal within each block.
FIG. 1 is a block diagram of a conventional video tape recorder for recording and reproducing a high-definition TV signal. A luminance signal Y and color differential signals Pb and Pr, respectively supplied to input terminals 10, 12 and 14, are respectively converted into digital signals by A/D converters 16, 18 and 20. The resultant luminance signal Y is directly sent to a frame memory 22 whereas the color differential signals Pb and Pr are converted into a line sequential signal by a color-differential signal sequential circuit 24 and then supplied to and stored in the frame memory 22. The luminance signal Y and the color differential signals Pb and Pr stored in the frame memory 22 are read out from the frame memory 22 in the form of a two-channel time-division multiplexed signal (TCI=Time Compressed Integration). This time-division multiplexed signal is converted into analog signals by D/A converters 26 and 28. Modulators 30 and 32 respectively conduct processings required to produce signals having a signal form adequate for magnetic recording, such as frequency modulation or low frequency band conversion. The resultant signals are supplied to a magnetic head on a rotation drum 34 respectively through recording amplifiers 31 and 33 and then recorded on a magnetic tape wound around the rotation drum 34.
For reproduction, the output of the magnetic head on the rotation drum 34 is supplied through reproduction amplifiers 35 and 37 to equalizing circuits 36 and 38 which conduct equalization of the waveform. The resultant reproduced signals are FM demodulated by demodulators 40 and 42, converted into digital signals by A/D converters 44 and 46 and then temporarily stored in the frame memory 48. The luminance signal read out from the frame memory 48 is converted into an analog signal by a D/A converter 50. The color-differential line sequential signal read out from the frame memory 48 is converted into simultaneous signals by a color-differential signal simultaneous circuit 52, and then converted into analog signals by D/A converters 54 and 56. Consequently, the reproduced luminance signal is output from an output terminal 58 while the reproduced color differential signals Pb and Pr are respectively output from output terminals 60 and 62.
Next, a synchronizing signal system will be described. A switch 66 supplies either an external synchronizing signal input to an input terminal 64 or a luminance signal containing a composite synchronizing signal which is input to an input terminal 10 to a synchronizing signal separation circuit 68 which separates a horizontal synchronizing signal and a vertical synchronizing signal. The separated horizontal and vertical synchronizing signals are applied to a timing control circuit 70 for the color-differential signal sequential circuit 24 and to a timing control circuit 72 for the frame memory 22 to time the operation of the color-differential signal sequential circuit and writing of data in the frame memory 22.
With regard to the reading-out system of the frame memory 22, a drum rotating signal which is in synchronism with the rotation of the drum 34 is applied from a drum rotation control circuit 35 of the rotation drum 34 to a timing control circuit 72, and to a timing control circuit 74 for the D/A converters 26 and 28, by which the data stored in the frame memory 22 is read out and then converted into digital signals synchronously with rotation of the rotation drum 34.
For reproduction, the above-described drum rotating signal is applied to a timing control circuit 76 for timing the D/A converters 44 and 46 and to a timing control circuit 78 for timing the frame memory 48. Consequently, a reproduced signal is converted into a digital signal and then written in the frame memory 48 synchronously with rotation of the rotation drum 34.
A synchronizing signal generation circuit 80 generates horizontal and vertical synchronizing signals in accordance with a standard clock signal. The generated horizontal and vertical synchronizing signals are supplied to the timing control circuit 78 and to a timing control circuit 82 for timing the color-differential signal simultaneous circuit 52 to time reading-out of data from the frame memory 48 and the operation of the color-differential signal simultaneous circuit 52. The synchronizing signal generated by the synchronizing signal generation circuit 80 is also supplied to a synchronizing signal output terminal 84.
The individual timing control circuits each introduce on the synchronizing signal input thereto a time delay required by the corresponding signal processing circuit and supplies the resultant signal to that signal processing circuit. For example, the timing control circuit 72 generates a timing signal whose passage is delayed by a time corresponding to the time delay generated in the A/D converter 16 in both horizontal and vertical directions during recording to the time of writing of the luminance signal Y in the frame memory 22. Also, the timing control circuit 72 generates a timing signal whose passage is delayed by a time corresponding to the signal delay generated in the A/D converters 18 and 20 and in the color-differential signal sequential circuit 24 in both vertical and horizontal directions to the time of writing of the color-differential signal Pb/Pr in the frame memory 22.
In the above-described configuration, in a case where a local circuit modification occurs in a certain circuit block, a change in the amount of signal delay caused by that modification spreads to the subsequent circuits, and the operation timing of all the circuit blocks in the same synchronization system must thus be modified.